Cisco PGW 2200 Softswitch

Document ID: 44407

Contents

Introduction
Prerequisites
      Requirements
      Components Used
      Fields
      Glossary
      Conventions
Problem
Solutions
      Solution 1
      Solution 2
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Related Information

Introduction

When using a Cisco AS5350, AS5400, or AS5400 HPX as an integrated Signaling Link Terminal (SLT) you may encounter a problem where the SS7 link does not come up during a new installation. This issue is specific to the new 2, 4, and 8-port E1/T1/CT3 (PRI) dial feature card (DFC) boards in this Trunking Gateway. The integrated SLT is used to terminate Signaling System 7 (SS7) signaling coming from the public switched telephone network (PSTN) and transport SS7 MTP3 layer and above over the IP to the Cisco PGW2200.

The issue is that during the Alignment phase of the SS7 link, the Gateway debugs show that SS7 messages are exchanged on the MTP2 layer (Link Status Signal Units (LSSUs)), but no LSSUs are sent out on the wire from the Gateway. This can be seen when a SS7 analyzer is used on the wire to capture the signaling messages traveling between the integrated SLT and the SS7 network to which you are connected.

Prerequisites

Requirements

There are no specific prerequisites for this document.

Components Used

The information in this document is based on the software and hardware versions below.

• Cisco AS5350 – The problem affects AS5400/AS5350 2, 4, and 8 PRI boards with version 4.x and not with version 3.x.

• Cisco AS5400 – The problem affects AS5400/AS5350 2, 4, and 8 PRI boards with version 4.x and not with version 3.x.

• Cisco AS5400 HPX – The problem affects AS5400/AS5350 2, 4, and 8 PRI boards with version 4.x and not with version 3.x.

• All Cisco IOS® Software releases that are used for terminating SS7 traffic that does not contain the Cisco bug ID CSCeb47086 ( registered customers only) fix.

Note: The 2, 4, and 8 port E1/T1/CT3 (PRI) board hardware was changed to use a new processor (MPC860, version D4). For compatibility with this change new SS7 firmware must be downloaded from the AS5350/AS5400 to the 8 PRI board.

The information presented in this document was created from devices in a specific lab environment. All of the devices used in this document started with a cleared (default) configuration. If you are working in a live network, ensure that you understand the potential impact of any command before using it.

Fields

• RX Serial Channel Controller (SCC) Interrupts: 22979389 – This field indicates how many times the Trunk DFC processor has checked the receive Buffer Descriptor (BD) ring for received MTP2 packets.

• RX SCC->Host BD Copies: 5313 – This field indicates how many MTP2 packets have been received by the trunk DFC processor and forwarded from the Trunk DFC card to the Host processor.

• RX Host Doorbell Interrupts: 1325 – This field indicates how many times the Trunk DFC processor has indicated to the Host processor that receive packets are available for processing by the MTP2 code running on the Host.

• RX Host->SCC BD Copies: 5326 – This field indicates how many times the Host processor has made an empty packet available to the Trunk DFC processor for receiving new MTP2 packets.

• TX Host Doorbell Interrupts: 22979390 – This field indicates how many times the Trunk processor has checked for new MTP2 packets made available by the Host processor.

• TX Host->SCC BD Copies: 19177750 – This field indicates how many MTP2 packets the Host processor has made available for transmit.

• TX SCC Interrupts: 22979389 – This field indicates how many times the Trunk DFC processor has checked if the SCC has completed transmitting an MTP2 packet.

• TX SCC Start Interrupts 22979389 – Same as the field above.

• TX SCC->Host BD Copies: 19177734 – This field indicates how many MTP2 packets the SCC has transmitted.

Glossary

• Serial Channel Controller (SCC) – part of the Trunk DFC processor that transmits and receives the MTP2 packets.

• Buffer Descriptor (BD) – data structure used by Trunk DFC processor to manage transmit and receive packets.

Conventions

For more information on document conventions, see the Cisco Technical Tips Conventions.

Problem

The SS7 link is not coming up (MTP2 layer alignment will not be passed). The Trunking Gateway correctly receives SS7 MTP2 traffic, but actually does not send any SS7 MTP2 traffic on the wire. The SS7 debug ss7 mtp2 packet command shows that the AS5xxx is transmitting SS7 MTP2 frames but the SS7 switch on the other side of the link does not receive them. An SS7 analyzer confirms that the AS5xxx actually does not transmit them.

Another symptom can been seen in the output of the show controller command for the serial interface where the SS7 link resides. When trying to establish the link, a discrepancy between “Interrupts” and “BD Copies” can be seen:

show controller serial x/y:z | include Copies|Interr
RX SCC Interrupts: 1488571
RX SCC->Host BD Copies: 1
RX Host Doorbell Interrupts: 0
RX Host->SCC BD Copies: 0
TX Host Doorbell Interrupts: 1488571
TX Host->SCC BD Copies: 1
TX SCC Interrupts: 1488571
TX SCC Start Interrupts 1488571
TX SCC->Host BD Copies: 1

The key symptom of the D4 processor problem is that the SCC TX side stops transmitting packets.

The key fields for debugging the D4 processor problem are:

1. TX Host->SCC BD Copies == 17

2. TX SCC->Host BD Copies == 1

The counters stuck at a small value indicate the SCC TX side has stopped.

A valid output can look like the following:

  RX SCC Interrupts:           612398602
  RX SCC->Host BD Copies:      2
  RX Host Doorbell Interrupts: 1
  RX Host->SCC BD Copies:      16
  TX Host Doorbell Interrupts: 612398603
  TX Host->SCC BD Copies:      584037617
  TX SCC Interrupts:           612398602
  TX SCC Start Interrupts      612398602
  TX SCC->Host BD Copies:      584037601

Solutions

The Cisco IOS Software releases that contain the fix are Cisco IOS Software Releases 12.3(3.3), 12.3(3.3)T, 12.3(3.1)T, 12.3(2.3)a, 12.3(1.9)T3, and 12.2(15)T7.

Solution 1

The problem affects AS5400/AS5350 8 PRI boards with version 4.x and not with version 3.x. It is possible to check the board hardware version with the show diag | include board hardware command.

The output includes:

• The board hardware version for the carrier card (this information is not important).

• The board hardware version of the 8 PRI board (take notice of this information).

The solution is to upgrade to a Cisco IOS Software release that includes a fix of Cisco bug ID CSCeb47086 ( registered customers only) (5400 HPX does not transmit LSSU).

Solution 2

Another solution is to use an old board that has version 3.x running. This is true for all boards with manufacture dates prior to 2003. Cisco Systems cannot guarantee that a return materials authorization (RMA) will be shipped out with an interface card of a specific version or manufacturing date.

V5400-3#show chassis slot detail

…
DFC type is AS5400 E1 8 PRI DFC

OIR events:
        Number of insertions = 0, Number of removals = 0
DFC State is DFC_S_OPERATIONAL

 Error events (Bus errors, PCI errors):
        Number of errors recovered = 0

Carrier Card Cookie Info:
Manufacture Cookie Info:
EEPROM Type 0x0001, EEPROM Version 0x01, Board ID 0x4D,
Board Hardware Version 3.1, Item Number 73-3997-03,
Board Revision B0, Serial Number JAE06230036,
PLD/ISP Version 2.2,  Manufacture Date 3-Jun-2002.
RMA Number1 <unset>, RMA Number2 <unset>
EEPROM format version 0
EEPROM contents (hex):
  0x00: 00 01 01 4D 03 01 00 49 00 0F 9D 03 42 00 4A 41
  0x10: 45 30 36 32 33 30 30 33 36 00 00 00 00 00 14 02
  0x20: 06 03 02 02 FF FF FF FF FF FF FF FF FF FF FF FF
  0x30: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
  0x40: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
  0x50: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
  0x60: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF F
  0x70: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
DFC Cookie Info:
Manufacture Cookie Info:
EEPROM Type 0x0001, EEPROM Version 0x01, Board ID 0x03,
Board Hardware Version 3.0, Item Number 73-3996-03,
Board Revision E0, Serial Number JAE0616025B,
PLD/ISP Version <unset>,  Manufacture Date 17-Apr-2002.
RMA Number1 <unset>, RMA Number2 <unset>
EEPROM format version 0
EEPROM contents (hex):
  0x00: 00 01 01 03 03 00 00 49 00 0F 9C 03 45 00 4A 41
  0x10: 45 30 36 31 36 30 32 35 42 00 00 00 00 00 14 02
  0x20: 04 11 FF FF FF FF FF FF FF FF FF FF FF FF FF FF
  0x30: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
  0x40: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF

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Related Information

• Integrated Signaling Link Terminal
• Cisco IOS Software Download Page ( registered customers only)
• Tech Notes for the PGW2200
• Configuration Examples for the PGW2200
• Voice Technologies
• Recommended Reading: Troubleshooting Cisco IP Telephony
• Technical Support - Cisco Systems